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LAYER 01 EUV LITHOGRAPHY λ 13.5 nm · watts

Last revised · MAY 13, 2026

How a tin droplet becomes a chip pattern.

A laser strikes tin droplets to make 13.5 nm light. That light prints the smallest features on advanced logic chips.

3.5

EUV tools / GW

13.5 nm

light wavelength

70

tools / year

6

mirrors per tool

Native unit

λ 13.5 nm · watts

What constrains it

Tool output is limited by how many EUV scanners can be built and qualified each year.

FIG. 01 LAYER 01 EUV LITHOGRAPHY

Fit overview · pinch to zoom

A
TIN DROPLET GENERATOR
30 µm
droplet diameter · 2 drops per second
B
CO₂ LASER
100 MW
peak power · pre-pulse + main pulse
C
PLASMA
200 000 K
hotter than the sun · emits 13.5 nm EUV
D
COLLECTOR MIRROR
Wolter-type
first multilayer Bragg reflector
SOURCE VESSEL
OPTICS COLUMN
VACUUM CHAMBER · 10⁻⁴ Pa
A
TIN DROPLET
30 µm · 2 drops/sec
B
CO₂ LASER
100 MW peak
C
PLASMA
200 000 K · 13.5 nm
D
COLLECTOR MIRROR
Wolter-type · multilayer
1 m · tool scale
focus point
13.5 nm
EUV BEAM
5 nm chip pattern →
12 m
3 m
ILLUMINATOR · 4 mirrors · Köhler
RETICLE STAGE · 4× mask · 9 G scan
PROJECTION · 6× Bragg · NA 0.33
E
F
G
H
WAFER STAGE · 300 mm · 75 wph
E
ILLUMINATOR
Köhler
flat-field illumination across mask
F
RETICLE STAGE
9 G
scan acceleration · sub-nm overlay
G
PROJECTION OPTICS
4× reduction
6 Bragg mirrors · NA 0.33
H
WAFER STAGE
75 wph
wafers exposed per hour
Drive laser strikes a tin droplet at 50 kHz. Plasma emits 13.5 nm photons. Photons reflect off Mo/Si Bragg multilayers onto the wafer.

What this layer does

EUV lithography is the first place the supply chain becomes visibly specialized. The scanner is not just a brighter printer. It is a tightly synchronized system that has to create light, preserve it through reflective optics, shape it with a mask, and land it cleanly on a wafer.

If scanner output or qualification slows, every downstream layer feels it: fewer advanced wafers get patterned, fewer packages get filled, and fewer accelerators make it into racks.

Read the machine

Read the scanner in one pass

A scanner only works when five hard steps stay aligned.

The important idea is not “a machine shines light on silicon.” It is that five difficult steps have to stay synchronized before a wafer receives one clean exposure.

01

Target

A tin droplet enters the source.

The scanner starts with a tiny moving target. Hitting it cleanly and repeatedly sets the cadence for the whole source.

Why it mattersIf the target stream is unstable, the rest of the optical path has nothing dependable to work with.

02

Ignition

A laser turns tin into plasma.

The energy burst creates a hot emitting plume that produces the 13.5 nm light EUV lithography needs.

Why it mattersThis is where electrical power becomes a usable chip-printing light source.

03

Capture

Mirrors collect the scarce light.

EUV cannot travel through ordinary lenses, so a collector mirror and Bragg mirror stack preserve as much usable light as possible.

Why it mattersEvery lost photon makes exposure slower or harder to hold stable.

04

Pattern

The mask turns light into circuit geometry.

The optical system projects the reticle pattern rather than “drawing” wires one by one.

Why it mattersThe scanner is transferring a complete field of chip structure with extreme precision.

05

Transfer

Photoresist on the wafer records the exposure.

The wafer surface reacts to the projected pattern so later etch and deposition steps can turn it into physical device features.

Why it mattersThis is the handoff from light path to actual chip manufacturing.

50 kHz

droplet cadence

The source must keep repeating the same high-precision event at industrial speed.

13.5 nm

light wavelength

That tiny wavelength is why EUV can resolve features older systems cannot.

6 mirrors

optical relay

The path is reflective because EUV is absorbed by ordinary transmissive optics.

The supporting view

FIG. 1.2 LAYER 01 BRAGG MIRROR STACK

Fit overview · pinch to zoom

F · IMAGE PLANE
REFERENCE CIRCLES · M1–M6 RADII OF CURVATURE
INCOMING · 13.5 nm
PROJECTION OPTICS
six multilayer mirrors
M1
2 400 mm
convex · aperture stop
M2
1 500 mm
concave
M3
1 200 mm
concave
M4
900 mm
convex
M5
750 mm
concave
M6
600 mm
concave · image-forming
BRAGG MULTILAYER
~40 bilayers · 7 nm pitch
surface roughness < 50 pm rms
Mo │ Si
Six multilayer Mo/Si mirrors fold the 13.5 nm beam from source to wafer. Orange marks the beam path; the Bragg stack is ~40 bilayers at 7 nm pitch.

One vendor builds every EUV scanner on Earth

ASML is the only company that ships EUV lithography systems. The drive laser comes from Trumpf, the projection optics from Zeiss SMT, the collector mirrors from a handful of private suppliers. None of those vendors sell EUV light to anyone else.

That is why the ceiling is a single P&L. ASML’s 2025 annual report shows €32.7 billion of net sales and €4.7 billion of R&D for the year, and the April 15, 2026 Q1 release raised FY2026 guidance to €36 billion to €40 billion. The Investor Day 2024 long-range model already points at roughly €44 billion to €60 billion by 2030.

When the chapter says scanner output slows and every downstream layer feels it, this is what that means. There is no second source. The bottleneck has a CEO and an annual report.

The ceiling is one division

ASML shipped roughly 70 EUV tools in fiscal 2025 and treats that as a running rate. The TL;DR math at the front of this guide says one gigawatt of AI capacity needs about 3.5 EUV tools to feed it. Divide one into the other.

70 ÷ 3.5 is 20. Push the tool count to the high end of ASML’s range, around 100, and you land near 29. That is the entire annual flow of new leading-edge AI capacity — every TSMC N2 wafer, every HBM ramp, every Samsung and Intel push, bidding into the same 20 to 30 gigawatts per year.

This is why the bottleneck tracker turns orange on EUV in 2027. Packaging unblocks and memory catches up; the chain then runs into one factory floor in Veldhoven. The ceiling does not move with money — it moves with tool count.

High-NA raises the price per tool, not the number of tools

ASML’s 2025 annual report records the first delivery of a full-spec TWINSCAN EXE:5200B to a customer during 2025. The EXE is the 0.55 NA platform — High-NA — designed for sub-2 nm logic and leading-edge DRAM. The first one has now left Veldhoven.

Price per EUV tool runs about $400 million today and is pencilled toward roughly $500 million by the end of the decade, per ASML’s Investor Day 2024 long-range model. The annual tool count does not change. The dollars per tool do.

So the ceiling has two faces. The tool-flow side caps gigawatts; the High-NA side raises the cost per die of being on the leading edge. Same 20 to 30 gigawatts of new capacity per year, paid for at a higher unit price — and only a handful of customers can write the cheque.

The whole guide begins with a machine that can place a pattern accurately enough to matter.